Phased-lock loop (PLL) circuits are widely used in communication systems, such as wireless and wired communication systems, and have various applications. Example applications of PLL circuits are in frequency multipliers, frequency translators, amplitude modulation (AM) and frequency modulation (FM) detectors, demodulators such as frequency shift keying (FSK) demodulators and other applications. An important functionality by a PLL circuit is phase and frequency detection, which is performed by a phase and frequency detection circuit.
A phase and frequency detection (PFD) circuit can be a first module of a PLL and along with the charge pump (CP) circuit, may take a substantial portion of the total PLL power consumption. Further, the Existing PFD circuits can cause the CP circuit consuming a large area. A PFD circuit leading to significantly lower power consumption and smaller chip area is desired.